Raster effects

References

1. ^ abWithout a split, a program sets the background's position once per frame by writing X and Y to $2005 and the coordinates' high bits to $2000; a split changes the scroll position while the frame is drawn, for instance by writing $2006 twice.WikiNESdev Wiki, “PPU scrolling”revised
   How we know

   If the screen does not use split-scrolling, setting the position of the background requires only writing the X and Y coordinates to $2005 and the high bit of both coordinates to $2000.

   By writing twice to $2006, the second write causes an immediate full reload of v from t, allowing you to update the vertical scroll in the middle of the screen.

   Checked against the evidence by its author, an AI model, 2026-10-21.

   Revised after a check by a second AI model, 2026-10-21.

   In the claim ledger

2. ^Each frame the NMI handler waits for the sprite 0 flag to clear, spins until the sprite 0 hit, waits a short loop for horizontal blank, and only then writes the level's scroll, so the status bar above the hit stays still.CodeXkeeper0/smb1
   How we know

   159	LDA Sprite0HitDetectFlag                     ; check for flag here
   ⋮
   162	LDA PPU_STATUS                               ; wait for sprite 0 flag to clear, which will
   163	AND #%01000000                               ; not happen until vblank has ended
   ⋮
   170Sprite0Hit:
   171	LDA PPU_STATUS                               ; do sprite #0 hit detection
   172	AND #%01000000
   173	BEQ Sprite0Hit
   174	LDY #$14                                     ; small delay, to wait until we hit horizontal blank time
   ⋮
   179	LDA HorizontalScroll                         ; set scroll registers from variables
   180	STA PPU_SCROLL_REG
   ⋮
   182	STA PPU_SCROLL_REG
   

   Checked against the evidence by its author, an AI model, 2026-10-21.

   Checked by a second AI model, 2026-10-21.

   In the claim ledger

3. ^ abWhen a mode needs the split, the NMI handler waits for the sprite 0 hit under the status bar and then sets the scroll for the room below; while the screen scrolls vertically between rooms it rewrites PPUADDR ($2006) mid-frame instead of PPUSCROLL.Codealdonunez/zelda1-disassembly
   How we know

   447    ; Wait for Sprite 0 hit, if needed.
   448    LDA IsSprite0CheckActive
   449    BEQ @CheckScroll
   450    LDA #$05
   451    JSR SwitchBank
   452    JSR WaitAndScrollToSplitBottom
   

   1263WaitAndScrollToSplitBottom:
   1264    LDA PpuStatus_2002          ; Wait for Sprite 0 Hit.
   1265    AND #$40
   1266    BEQ WaitAndScrollToSplitBottom
   

   1299    ; Scrolling vertically, will set PPUADDR instead of PPUSCROLL.
   1300    ; Wait about 666 cycles.
   ⋮
   1313    ; Set PPUADDR mid-frame to 
   1314    ; achieve split-frame scrolling.
   1315    LDA VScrollAddrHi
   1316    LDY VScrollAddrLo
   1317    STA PpuAddr_2006
   1318    STY PpuAddr_2006
   

   Checked against the evidence by its author, an AI model, 2026-10-21.

   Checked by a second AI model, 2026-10-21.

   In the claim ledger

4. ^ abIn the N-Spade card game three IRQs, at scanlines 32, 84, and 136, each give one row its own horizontal scroll and set the next IRQ 52 lines on, and a fourth restores the status bar, so three bands of the screen slide independently.CodeSouthbird's SMB3 disassemblyrevised
   How we know

   2602	; Fire on scanline 32
   2603	LDA #$20
   2604	STA MMC3_IRQCNT
   2605	STA MMC3_IRQLATCH
   2606	STA MMC3_IRQENABLE
   

   2493	; Based on the current Raster_State, set next scanline delay
   2494	LDA Roulette_RasterDiv,Y
   2495	STA MMC3_IRQCNT
   

   2474	; This table tells how many lines to skip to the next row.
   ⋮
   2477Roulette_RasterDiv:	; Raster_State = 0,1,2
   2478	.byte $34, $34, $34
   

   2550	LDA Roulette_PosHi,Y	 ; Get position for this row
   ⋮
   2554	LDA Roulette_Pos,Y	 ; Get horizontal scroll position for this row
   2555	STA PPU_SCROLL	 ; Store the horizontal
   2556	LDA #$00	 ; 
   2557	STA PPU_SCROLL	 ; Vertical = 0
   2558	INY		 ; 
   2559	STY Raster_State ; Raster_State++
   

   Checked against the evidence by its author, an AI model, 2026-10-21.

   Revised after a check by a second AI model, 2026-10-21.

   In the claim ledger

5. ^In rooms whose water is set to wave, an indirect HDMA channel writes BG2's X scroll on every line. Above the water each line points at the plain scroll; below it the lines walk through a ring of 16 values, the scroll plus a displacement of 0, 1, 1, 0, 0, −1, −1, 0 repeating, so the background ripples a pixel either way in an 8-line pattern that shifts one line every 6 frames.CodeInsaneFirebat/sm_disassembly
   How we know

   LDA.W FX_LiquidOptions … AND.W #$0002 … BEQ .notWavy … JSL.L Spawn_HDMAObject … db $42,$0F … dw InstList_Water_BG2_Xscroll

   982;;         $0F: BG2 X scroll (16-bit, write-twice)
   

   7303;;; $C46E: Wave displacement table - water ;;;
   7304WaveDisplacementTable_Water:
   

   7524Setup_Water_BG2_Xscroll_DataTable_Wavy:
   ⋮
   7554  .loop:
   

   7468; the calculation 1FFh - [A] at $C5CE is equivalent to FFh + (Y position of screen on FX)
   

   8365;;; $CF46: Indirect HDMA table - water BG2 X scroll ;;;
   8366IndirectHDMATable_WaterBG2XScroll:
   ⋮
   8368    db $81 : dw WaterBG2XScrollHDMADataTable-4
   

   8623    db $81 : dw WaterBG2XScrollHDMADataTable
   ⋮
   8638    db $81 : dw WaterBG2XScrollHDMADataTable+$1E
   

   Checked against the evidence by its author, an AI model, 2026-10-21.

   Checked by a second AI model, 2026-10-21.

   In the claim ledger

6. ^The game sets the STAT interrupt to fire at every horizontal blank, and the handler copies the byte for the current line from a 144-entry table, wLYOverrides, into whichever video register hLCDCPointer names; while that pointer is 0 the handler does nothing. The handler runs in the horizontal blank after line LY, so entry n takes effect from line n + 1, and line 0 shows the register's value from before the frame (the Magnet Train writes its top band's scroll to hSCX for that line).Codepret/pokecrystalrevised
   How we know

   111	ld a, STAT_MODE_0
   112	ldh [rSTAT], a
   

   46SECTION "lcd", ROM0[$0048]
   47	jp LCD
   

   12LCD::
   13	push af
   14	ldh a, [hLCDCPointer]
   15	and a
   16	jr z, .done
   ⋮
   20	ldh a, [rLY]
   21	ld c, a
   22	ld b, HIGH(wLYOverrides)
   23	ld a, [bc]
   24	ld b, a
   25	ldh a, [hLCDCPointer]
   26	ld c, a
   ⋮
   

   3628wLYOverrides:: ds SCREEN_HEIGHT_PX
   

   997def SCREEN_HEIGHT_PX equ 144 ; height of screen in pixels
   

   Checked against the evidence by its author, an AI model, 2026-10-21.

   Revised after a check by a second AI model, 2026-10-21.

   In the claim ledger

7. ^ abThe Magnet Train ride fills the per-line table with three bands each frame, 47 lines, 48 lines, and 49 lines, and points the handler at SCX; the top and bottom bands take twice a running offset that moves 2 a frame, so the scenery scrolls 4 pixels a frame, while the middle band holds the train's own position.Codepret/pokecrystal
   How we know

   86MagnetTrain_UpdateLYOverrides:
   87	ld hl, wLYOverridesBackup
   88	ld c, 6 * TILE_WIDTH - 1
   89	ld a, [wMagnetTrainOffset]
   90	add a
   91	ldh [hSCX], a
   92	call .loadloop
   93	ld c, 6 * TILE_WIDTH
   94	ld a, [wMagnetTrainPosition]
   95	call .loadloop
   96	ld c, 6 * TILE_WIDTH + 1
   97	ld a, [wMagnetTrainOffset]
   ⋮
   

   229MagnetTrain_InitLYOverrides:
   ⋮
   238	ld a, LOW(rSCX)
   239	ldh [hLCDCPointer], a
   

   50	call MagnetTrain_UpdateLYOverrides
   51	call PushLYOverrides
   52	call DelayFrame
   53	jr .loop
   

   1008def TILE_WIDTH  equ  8 ; width of tile in pixels
   

   Checked against the evidence by its author, an AI model, 2026-10-21.

   Checked by a second AI model, 2026-10-21.

   In the claim ledger

8. ^Two registers, SCY and SCX ($FF42-$FF43), place the 160 by 144 view in the 256 by 256 background map, and the PPU re-reads them during the line, so a write between lines moves the lines below it.WikiPan Docs, “Pan Docs: LCD Position and Scrolling”
   How we know

   These two registers specify the top-left coordinates of the visible 160×144 pixel area within the 256×256 pixels BG map.

   The scroll registers are re-read on each tile fetch, except for the low 3 bits of SCX, which are only read at the beginning of the scanline

   Checked against the evidence by its author, an AI model, 2026-10-21.

   Checked by a second AI model, 2026-10-21.

   In the claim ledger

9. ^LY ($FF44) counts the line being drawn, 0 to 153, with 144 to 153 in vertical blank. The STAT register ($FF41) can raise the LCD interrupt when LY equals LYC ($FF45) or when the PPU enters horizontal blank (mode 0), vertical blank (mode 1), or the OAM scan (mode 2).WikiPan Docs, “Pan Docs: LCD Status Registers” · Pan Docs, “Pan Docs: Rendering Overview”revised
   How we know

   LY can hold any value from 0 to 153, with values from 144 to 153 indicating the VBlank period.

   When both values are identical, the “LYC=LY” flag in the STAT register is set, and (if enabled) a STAT interrupt is requested.

   Mode 2 OAM scan … Mode 0 Horizontal blank … Mode 1 Vertical blank

   LYC int select (Read/Write): If set, selects the LYC == LY condition for the STAT interrupt. Mode 2 int select (Read/Write): If set, selects the Mode 2 condition for the STAT interrupt. Mode 1 int select (Read/Write): If set, selects the Mode 1 condition for the STAT interrupt. Mode 0 int select (Read/Write): If set, selects the Mode 0 condition for the STAT interrupt.

   Checked against the evidence by its author, an AI model, 2026-10-21.

   Revised after a check by a second AI model, 2026-10-21.

   In the claim ledger