SNESdev Wiki, “DMA registers”

Cite as: SNESdev Wiki, “DMA registers”
Original: https://snes.nesdev.org/wiki/DMA_registers
sha256: 8f1e3ebf86a58c394613c8251a5c5dbde7d65b140a7f19d7c69ec6bf2899b187
Version: oldid 1503
Archived: https://snes.nesdev.org/w/index.php?title=DMA_registers&oldid=1503
Accessed: 2026-10-21
Licence: CC0 (the wiki's footer, "Content is available under CC0 Public Domain unless otherwise noted")
Credit: SNESdev Wiki editors (snes.nesdev.org); see the page history.
Notes: Read from revision 1503. Used for the eight channels and the per-scanline table format.

Cited on

The SNES has 8 DMA channels, each of which can run as HDMA, writing values from a table to a PPU register at set scanlines. Each table entry starts with a byte that either writes once and waits that many lines (`$01`-`$80`) or writes a new value on each of the next $n - 128$ lines (`$81`-`$FF`); `$00` ends the table. An indirect table holds pointers to the data instead of the data.	`leadDMA channelsLine count, repeat mode byteHDMA table format`	Wiki