Super NES hardware (SNESdev Wiki)

The SNES PPU draws up to four background layers in one of eight modes; Mode 1, the most common, has two 16-color layers (BG1 and BG2) and a 4-color BG3 that can be raised above them, often for a HUD or text box. snes-hardware/mode-1

About: Status bar split

Value

{
 "modes": 8,
 "mode1": {
  "BG1": 4,
  "BG2": 4,
  "BG3": 2
 }
}

WikiBackgrounds · PropertiesEach of the 4 BG layers has several independent properties:Backgrounds · Mode 1The most commonly used mode, which has two main 4bpp (16 color) layers BG1 and BG2, and one auxiliar 2bpp (4 color) layer BG3. BG3 has an additional priority control in mode 1.Backgrounds · Mode 1In many games, BG1 and BG2 are used for a colourful main background with parallax, and BG3 to overlay a HUD or text box.PPU registers · BGMODE - BG mode and Character size ($2105 write)|||| |+++- BG mode (see below)Checked by claude-agent, 2026-10-21 — read the Mode 1 section and BGMODE's bit layout in the pinned captures

Mode 7 has a single background layer, a 128 by 128 tile map of 256 8 by 8 tiles (1,024 by 1,024 pixels) that the PPU transforms by a 2 by 2 matrix, M7A to M7D ($211B-$211E, 8.8 fixed point), about a center set by M7X and M7Y. snes-hardware/mode-7

About: Mode 7

Value

{
 "mapTiles": 128,
 "tiles": 256,
 "pixels": 1024,
 "matrix": [
  "$211B",
  "$211C",
  "$211D",
  "$211E"
 ],
 "fraction": 8
}

WikiBackgrounds · Mode 7Mode 7 ignores most of the layer configuration options, and instead always occupies the entire first half of VRAM with a 128x128 tilemap, and 256 available 8x8 tiles.Backgrounds · Mode 7This provides a single background layer that has a unique transformation property.PPU registers · M7A - Mode 7 matrix A and Multiplication factor 1 ($211B write twice)Mode 7 matrix A (8.8 fixed point)PPU registers · M7n - Mode 7 matrix C-D ($211D-211E write twice)Mode 7 matrix n (8.8 fixed point)PPU registers · M7X - Mode 7 center X ($211F write twice)Mode 7 center X (signed)Checked by claude-agent, 2026-10-21 — read the Mode 7 section and the M7A-M7D, M7X register entries in the pinned captures

The Backgrounds page notes that Mode 7 is "sometimes used for large rotating boss characters", with sprites drawing what would otherwise be background, and another mode switched in mid-frame for a floor.

Cited by: Mode 7

The SNES has 8 DMA channels, each of which can run as HDMA, writing values from a table to a PPU register at set scanlines. Each table entry starts with a byte that either writes once and waits that many lines ($01-$80) or writes a new value on each of the next $n - 128$ lines ($81-$FF); $00 ends the table. An indirect table holds pointers to the data instead of the data. snes-hardware/hdma

About: HDMA

Value

{
 "channels": 8,
 "end": 0,
 "waitMax": 128,
 "repeatFrom": 129
}

WikiDMA registers · leadThe SNES also features HDMA (Horizontal-blank DMA) which runs in the background and can be set up to automatically write values to hardware registers at specific scanlines, allowing for effects.DMA registers · DMA channelsThe SNES contains 8 separate DMA "channels"DMA registers · Line count, repeat mode byte$00: Stop processing HDMA on that channel for the rest of the frame. $01-$80: Write once, then wait for X scanlines $81-$FF: Write every scanline for X-$80 scanlines, repeat modeDMA registers · HDMA table formatThe tables can either directly contain the values (Direct mode) or specify 16-bit pointers that are then used to get the values (Indirect mode).Checked by claude-agent, 2026-10-21 — read the lead, the channel section, and the HDMA table format in the pinned capture

Cited by: HDMA

Sound runs on its own processor, the SPC700 (S-SMP) at 1.024 MHz with 64 KB of audio RAM, beside the S-DSP, which plays 8 voices from BRR samples at variable rates and outputs 16-bit stereo at a nominal 32,000 Hz. snes-hardware/sound

About: Sampled sound

Value

{
 "cpuHz": 1024000,
 "ramKB": 64,
 "voices": 8,
 "outputHz": 32000
}

WikiS-SMP · leadSony SPC-700 processor, clocked at 1.024MHzS-SMP · lead8 voice channels Decodes BRR samples at a variable sample rate using 4-point Gaussian interpolationS-SMP · leadAudio-RAM: 64KiB RAM from two 32K x 8bit PSRAM chips.S-SMP · leadDigital to analog converter, outputting the analog audio signal from the DSP's stereo 16-bit 32000 Hz digital audio.Checked by claude-agent, 2026-10-21 — read the component list at the top of the pinned capture

Cited by: Sampled sound

BRR stores samples in 9-byte blocks of 16 4-bit samples, each block led by a byte with a shift, a decoding filter, and loop and end flags. snes-hardware/brr

About: Sampled sound

Value

{
 "blockBytes": 9,
 "samplesPerBlock": 16,
 "bits": 4
}

WikiBRR samples · leadBRR is composed of 16-sample blocks, each of which is stored in 9 bytes of data. This is a 1 byte control block, followed by 8 bytes containing 16 4-bit samples to be decoded (high nibble first).BRR samples · leadLeft-shift (S), decoding filter (F), loop (L), end (E).Checked by claude-agent, 2026-10-21 — read the block layout in the pinned capture

Cited by: Sampled sound